#![allow(unused)]

use std::collections::HashMap;

use serde::Deserialize;

struct Function {
    name: &'static str,
    arguments: &'static [&'static Type],
    ret: Option<&'static Type>,
    target_feature: Option<&'static str>,
    instrs: &'static [&'static str],
    file: &'static str,
    required_const: &'static [usize],
    has_test: bool,
    doc: &'static str,
}

static BOOL: Type = Type::PrimBool;
static F16: Type = Type::PrimFloat(16);
static F32: Type = Type::PrimFloat(32);
static F64: Type = Type::PrimFloat(64);
static I16: Type = Type::PrimSigned(16);
static I32: Type = Type::PrimSigned(32);
static I64: Type = Type::PrimSigned(64);
static I8: Type = Type::PrimSigned(8);
static U16: Type = Type::PrimUnsigned(16);
static U32: Type = Type::PrimUnsigned(32);
static U64: Type = Type::PrimUnsigned(64);
static U8: Type = Type::PrimUnsigned(8);
static NEVER: Type = Type::Never;
static VOID: Type = Type::Void;
static GENERICT: Type = Type::GenericParam("T");
static GENERICU: Type = Type::GenericParam("U");

static F16X4: Type = Type::F(16, 4, 1);
static F16X4X2: Type = Type::F(16, 4, 2);
static F16X4X3: Type = Type::F(16, 4, 3);
static F16X4X4: Type = Type::F(16, 4, 4);
static F16X8: Type = Type::F(16, 8, 1);
static F16X8X2: Type = Type::F(16, 8, 2);
static F16X8X3: Type = Type::F(16, 8, 3);
static F16X8X4: Type = Type::F(16, 8, 4);
static F32X2: Type = Type::F(32, 2, 1);
static F32X2X2: Type = Type::F(32, 2, 2);
static F32X2X3: Type = Type::F(32, 2, 3);
static F32X2X4: Type = Type::F(32, 2, 4);
static F32X4: Type = Type::F(32, 4, 1);
static F32X4X2: Type = Type::F(32, 4, 2);
static F32X4X3: Type = Type::F(32, 4, 3);
static F32X4X4: Type = Type::F(32, 4, 4);
static F64X1: Type = Type::F(64, 1, 1);
static F64X1X2: Type = Type::F(64, 1, 2);
static F64X1X3: Type = Type::F(64, 1, 3);
static F64X1X4: Type = Type::F(64, 1, 4);
static F64X2: Type = Type::F(64, 2, 1);
static F64X2X2: Type = Type::F(64, 2, 2);
static F64X2X3: Type = Type::F(64, 2, 3);
static F64X2X4: Type = Type::F(64, 2, 4);
static I16X2: Type = Type::I(16, 2, 1);
static I16X4: Type = Type::I(16, 4, 1);
static I16X4X2: Type = Type::I(16, 4, 2);
static I16X4X3: Type = Type::I(16, 4, 3);
static I16X4X4: Type = Type::I(16, 4, 4);
static I16X8: Type = Type::I(16, 8, 1);
static I16X8X2: Type = Type::I(16, 8, 2);
static I16X8X3: Type = Type::I(16, 8, 3);
static I16X8X4: Type = Type::I(16, 8, 4);
static I32X2: Type = Type::I(32, 2, 1);
static I32X2X2: Type = Type::I(32, 2, 2);
static I32X2X3: Type = Type::I(32, 2, 3);
static I32X2X4: Type = Type::I(32, 2, 4);
static I32X4: Type = Type::I(32, 4, 1);
static I32X4X2: Type = Type::I(32, 4, 2);
static I32X4X3: Type = Type::I(32, 4, 3);
static I32X4X4: Type = Type::I(32, 4, 4);
static I64X1: Type = Type::I(64, 1, 1);
static I64X1X2: Type = Type::I(64, 1, 2);
static I64X1X3: Type = Type::I(64, 1, 3);
static I64X1X4: Type = Type::I(64, 1, 4);
static I64X2: Type = Type::I(64, 2, 1);
static I64X2X2: Type = Type::I(64, 2, 2);
static I64X2X3: Type = Type::I(64, 2, 3);
static I64X2X4: Type = Type::I(64, 2, 4);
static I8X16: Type = Type::I(8, 16, 1);
static I8X16X2: Type = Type::I(8, 16, 2);
static I8X16X3: Type = Type::I(8, 16, 3);
static I8X16X4: Type = Type::I(8, 16, 4);
static I8X4: Type = Type::I(8, 4, 1);
static I8X8: Type = Type::I(8, 8, 1);
static I8X8X2: Type = Type::I(8, 8, 2);
static I8X8X3: Type = Type::I(8, 8, 3);
static I8X8X4: Type = Type::I(8, 8, 4);
static P128: Type = Type::PrimPoly(128);
static P16: Type = Type::PrimPoly(16);
static P16X4X2: Type = Type::P(16, 4, 2);
static P16X4X3: Type = Type::P(16, 4, 3);
static P16X4X4: Type = Type::P(16, 4, 4);
static P16X8X2: Type = Type::P(16, 8, 2);
static P16X8X3: Type = Type::P(16, 8, 3);
static P16X8X4: Type = Type::P(16, 8, 4);
static P64: Type = Type::PrimPoly(64);
static P64X1X2: Type = Type::P(64, 1, 2);
static P64X1X3: Type = Type::P(64, 1, 3);
static P64X1X4: Type = Type::P(64, 1, 4);
static P64X2X2: Type = Type::P(64, 2, 2);
static P64X2X3: Type = Type::P(64, 2, 3);
static P64X2X4: Type = Type::P(64, 2, 4);
static P8: Type = Type::PrimPoly(8);
static POLY16X4: Type = Type::P(16, 4, 1);
static POLY16X8: Type = Type::P(16, 8, 1);
static POLY64X1: Type = Type::P(64, 1, 1);
static POLY64X2: Type = Type::P(64, 2, 1);
static POLY8X16: Type = Type::P(8, 16, 1);
static POLY8X16X2: Type = Type::P(8, 16, 2);
static POLY8X16X3: Type = Type::P(8, 16, 3);
static POLY8X16X4: Type = Type::P(8, 16, 4);
static POLY8X8: Type = Type::P(8, 8, 1);
static POLY8X8X2: Type = Type::P(8, 8, 2);
static POLY8X8X3: Type = Type::P(8, 8, 3);
static POLY8X8X4: Type = Type::P(8, 8, 4);
static U16X4: Type = Type::U(16, 4, 1);
static U16X4X2: Type = Type::U(16, 4, 2);
static U16X4X3: Type = Type::U(16, 4, 3);
static U16X4X4: Type = Type::U(16, 4, 4);
static U16X8: Type = Type::U(16, 8, 1);
static U16X8X2: Type = Type::U(16, 8, 2);
static U16X8X3: Type = Type::U(16, 8, 3);
static U16X8X4: Type = Type::U(16, 8, 4);
static U32X2: Type = Type::U(32, 2, 1);
static U32X2X2: Type = Type::U(32, 2, 2);
static U32X2X3: Type = Type::U(32, 2, 3);
static U32X2X4: Type = Type::U(32, 2, 4);
static U32X4: Type = Type::U(32, 4, 1);
static U32X4X2: Type = Type::U(32, 4, 2);
static U32X4X3: Type = Type::U(32, 4, 3);
static U32X4X4: Type = Type::U(32, 4, 4);
static U64X1: Type = Type::U(64, 1, 1);
static U64X1X2: Type = Type::U(64, 1, 2);
static U64X1X3: Type = Type::U(64, 1, 3);
static U64X1X4: Type = Type::U(64, 1, 4);
static U64X2: Type = Type::U(64, 2, 1);
static U64X2X2: Type = Type::U(64, 2, 2);
static U64X2X3: Type = Type::U(64, 2, 3);
static U64X2X4: Type = Type::U(64, 2, 4);
static U8X16: Type = Type::U(8, 16, 1);
static U8X16X2: Type = Type::U(8, 16, 2);
static U8X16X3: Type = Type::U(8, 16, 3);
static U8X16X4: Type = Type::U(8, 16, 4);
static U8X8: Type = Type::U(8, 8, 1);
static U8X4: Type = Type::U(8, 4, 1);
static U8X8X2: Type = Type::U(8, 8, 2);
static U8X8X3: Type = Type::U(8, 8, 3);
static U8X8X4: Type = Type::U(8, 8, 4);

static SVBOOL: Type = Type::Pred(1);
static SVBOOLX2: Type = Type::Pred(2);
static SVBOOLX3: Type = Type::Pred(3);
static SVBOOLX4: Type = Type::Pred(4);
static SVCOUNT: Type = Type::Pred(1);
static SVF16: Type = Type::SVF(16, 1);
static SVF16X2: Type = Type::SVF(16, 2);
static SVF16X3: Type = Type::SVF(16, 3);
static SVF16X4: Type = Type::SVF(16, 4);
static SVF32: Type = Type::SVF(32, 1);
static SVF32X2: Type = Type::SVF(32, 2);
static SVF32X3: Type = Type::SVF(32, 3);
static SVF32X4: Type = Type::SVF(32, 4);
static SVF64: Type = Type::SVF(64, 1);
static SVF64X2: Type = Type::SVF(64, 2);
static SVF64X3: Type = Type::SVF(64, 3);
static SVF64X4: Type = Type::SVF(64, 4);
static SVI8: Type = Type::SVI(8, 1);
static SVI8X2: Type = Type::SVI(8, 2);
static SVI8X3: Type = Type::SVI(8, 3);
static SVI8X4: Type = Type::SVI(8, 4);
static SVI16: Type = Type::SVI(16, 1);
static SVI16X2: Type = Type::SVI(16, 2);
static SVI16X3: Type = Type::SVI(16, 3);
static SVI16X4: Type = Type::SVI(16, 4);
static SVI32: Type = Type::SVI(32, 1);
static SVI32X2: Type = Type::SVI(32, 2);
static SVI32X3: Type = Type::SVI(32, 3);
static SVI32X4: Type = Type::SVI(32, 4);
static SVI64: Type = Type::SVI(64, 1);
static SVI64X2: Type = Type::SVI(64, 2);
static SVI64X3: Type = Type::SVI(64, 3);
static SVI64X4: Type = Type::SVI(64, 4);
static SVU8: Type = Type::SVU(8, 1);
static SVU8X2: Type = Type::SVU(8, 2);
static SVU8X3: Type = Type::SVU(8, 3);
static SVU8X4: Type = Type::SVU(8, 4);
static SVU16: Type = Type::SVU(16, 1);
static SVU16X2: Type = Type::SVU(16, 2);
static SVU16X3: Type = Type::SVU(16, 3);
static SVU16X4: Type = Type::SVU(16, 4);
static SVU32: Type = Type::SVU(32, 1);
static SVU32X2: Type = Type::SVU(32, 2);
static SVU32X3: Type = Type::SVU(32, 3);
static SVU32X4: Type = Type::SVU(32, 4);
static SVU64: Type = Type::SVU(64, 1);
static SVU64X2: Type = Type::SVU(64, 2);
static SVU64X3: Type = Type::SVU(64, 3);
static SVU64X4: Type = Type::SVU(64, 4);
static SVPRFOP: Type = Type::Enum("svprfop");
static SVPATTERN: Type = Type::Enum("svpattern");

#[derive(Debug, Copy, Clone, PartialEq)]
enum Type {
    Void,
    PrimBool,
    PrimFloat(u8),
    PrimSigned(u8),
    PrimUnsigned(u8),
    PrimPoly(u8),
    MutPtr(&'static Type),
    ConstPtr(&'static Type),
    Enum(&'static str),
    GenericParam(&'static str),
    I(u8, u8, u8),
    U(u8, u8, u8),
    P(u8, u8, u8),
    F(u8, u8, u8),
    Pred(u8),
    SVI(u8, u8),
    SVU(u8, u8),
    SVF(u8, u8),
    Never,
}

stdarch_verify::arm_functions!(static FUNCTIONS);

macro_rules! bail {
    ($($t:tt)*) => (return Err(format!($($t)*)))
}

#[test]
fn verify_all_signatures() {
    // Reference: https://developer.arm.com/architectures/instruction-sets/intrinsics
    let json = include_bytes!("../../../intrinsics_data/arm_intrinsics.json");
    let intrinsics: Vec<JsonIntrinsic> = serde_json::from_slice(json).unwrap();
    let map = parse_intrinsics(intrinsics);

    let mut all_valid = true;
    for rust in FUNCTIONS {
        // Most SVE intrinsics just rely on the intrinsics test tool for validation
        if !rust.has_test {
            if !SKIP_RUNTIME_TESTS.contains(&rust.name)
                // Most run-time tests are handled by the intrinsic-test tool, except for
                // load/stores (which have generated tests)
                && (!rust.name.starts_with("sv") || rust.name.starts_with("svld")
                    || rust.name.starts_with("svst"))
                // The load/store test generator can't handle these cases yet
                && (!rust.name.contains("_u32base_") || rust.name.contains("index") || rust.name.contains("offset"))
                && !(rust.name.starts_with("svldff1") && rust.name.contains("gather"))
            {
                println!("missing run-time test for `{}`", rust.name);
                all_valid = false;
            }
        }

        // Skip some intrinsics that aren't NEON and are located in different
        // places than the whitelists below.
        match rust.name {
            "brk" | "__breakpoint" | "udf" | "_prefetch" => continue,
            _ => {}
        }
        // Skip some intrinsics that are present in GCC and Clang but
        // are missing from the official documentation.
        let skip_intrinsic_verify = [
            "vmov_n_p64",
            "vmovq_n_p64",
            "vreinterpret_p64_s64",
            "vreinterpret_f32_p64",
            "vreinterpretq_f32_p64",
            "vreinterpretq_p64_p128",
            "vreinterpretq_p128_p64",
            "vreinterpretq_f32_p128",
            "vtst_p16",
            "vtstq_p16",
            "__dbg",
        ];
        let arm = match map.get(rust.name) {
            Some(i) => i,
            None => {
                // Skip all these intrinsics as they're not listed in NEON
                // descriptions online.
                //
                // TODO: we still need to verify these intrinsics or find a
                // reference for them, need to figure out where though!
                if !rust.file.ends_with("dsp.rs\"")
                    && !rust.file.ends_with("sat.rs\"")
                    && !rust.file.ends_with("simd32.rs\"")
                    && !rust.file.ends_with("v6.rs\"")
                    && !rust.file.ends_with("v7.rs\"")
                    && !rust.file.ends_with("v8.rs\"")
                    && !rust.file.ends_with("mte.rs\"")
                    && !rust.file.ends_with("rand.rs\"")
                    && !rust.file.ends_with("ex.rs\"")
                    && !skip_intrinsic_verify.contains(&rust.name)
                {
                    println!(
                        "missing arm definition for {:?} in {}",
                        rust.name, rust.file
                    );
                    all_valid = false;
                }
                continue;
            }
        };

        if let Err(e) = matches(rust, arm) {
            println!("failed to verify `{}`", rust.name);
            println!("  * {e}");
            all_valid = false;
        }
    }
    assert!(all_valid);
}

fn matches(rust: &Function, arm: &Intrinsic) -> Result<(), String> {
    if rust.ret != arm.ret.as_ref() {
        bail!("mismatched return value")
    }
    if rust.arguments.len() != arm.arguments.len() {
        bail!("mismatched argument lengths");
    }

    let mut nconst = 0;
    let iter = rust.arguments.iter().zip(&arm.arguments).enumerate();
    for (i, (rust_ty, (arm, arm_const))) in iter {
        match (*rust_ty, arm) {
            // SVE uses generic type parameters to handle void pointers
            (Type::ConstPtr(Type::GenericParam("T")), Type::ConstPtr(Type::Void)) => (),
            // SVE const generics use i32 over u64 for usability reasons
            (Type::PrimSigned(32), Type::PrimUnsigned(64)) if rust.required_const.contains(&i) => {
                ()
            }
            // svset doesn't have its const argument last as we assumed when building the Function
            _ if rust.name.starts_with("svset") => (),
            (x, y) if x == y => (),
            _ => bail!("mismatched arguments: {rust_ty:?} != {arm:?}"),
        }
        if *arm_const {
            nconst += 1;
            if !rust.required_const.contains(&i) && !rust.name.starts_with("svset") {
                bail!("argument const mismatch");
            }
        }
    }
    if nconst != rust.required_const.len() {
        bail!("wrong number of const arguments");
    }

    if rust.instrs.is_empty()
        && arm.instruction != ""
        && !SKIP_ASSERT_INSTR_TESTS.contains(&rust.name)
    {
        bail!(
            "instruction not listed for `{}`, but arm lists {:?}",
            rust.name,
            arm.instruction
        );
    } else if false
    // TODO: This instruction checking logic needs work to handle multiple instructions and to only
    // look at aarch64 insructions.
    // The ACLE's listed instructions are a guideline only and compilers have the freedom to use
    // different instructions in dfferent cases which makes this an unreliable testing method. It
    // is of questionable value given the intrinsic test tool.
    {
        for instr in rust.instrs {
            if arm.instruction.starts_with(instr) {
                continue;
            }
            // sometimes arm says `foo` and disassemblers say `vfoo`, or
            // sometimes disassemblers say `vfoo` and arm says `sfoo` or `ffoo`
            if instr.starts_with('v')
                && (arm.instruction.starts_with(&instr[1..])
                    || arm.instruction[1..].starts_with(&instr[1..]))
            {
                continue;
            }
            bail!(
                "arm failed to list `{}` as an instruction for `{}` in {:?}",
                instr,
                rust.name,
                arm.instruction,
            );
        }
    }

    // TODO: verify `target_feature`.

    Ok(())
}

#[derive(Debug, PartialEq)]
struct Intrinsic {
    name: String,
    ret: Option<Type>,
    arguments: Vec<(Type, bool)>,
    instruction: String,
}

// These structures are similar to those in json_parser.rs in intrinsics-test
#[derive(Deserialize, Debug)]
struct JsonIntrinsic {
    name: String,
    arguments: Vec<String>,
    return_type: ReturnType,
    #[serde(default)]
    instructions: Option<Vec<Vec<String>>>,
}

#[derive(Deserialize, Debug)]
struct ReturnType {
    value: String,
}

fn parse_intrinsics(intrinsics: Vec<JsonIntrinsic>) -> HashMap<String, Intrinsic> {
    let mut ret = HashMap::new();
    for intr in intrinsics.into_iter() {
        let f = parse_intrinsic(intr);
        ret.insert(f.name.clone(), f);
    }
    ret
}

fn parse_intrinsic(mut intr: JsonIntrinsic) -> Intrinsic {
    let name = intr.name;
    // Remove '[' and ']' so that intrinsics of the form `svwhilerw[_s16]` becomes `svwhilerw_s16`.
    let name = name.replace('[', "").replace(']', "");
    let ret = if intr.return_type.value == "void" {
        None
    } else {
        Some(parse_ty(&intr.return_type.value))
    };

    // This ignores multiple instructions and different optional sequences for now to mimic
    // the old HTML scraping behaviour
    let instruction = intr
        .instructions
        .map_or(String::new(), |mut i| i.swap_remove(0).swap_remove(0));

    let arguments = intr
        .arguments
        .iter()
        .map(|s| {
            let ty = if let Some(i) = s.find('*') {
                &s[..i + 1]
            } else {
                s.rsplit_once(' ').unwrap().0.trim_start_matches("const ")
            };
            let ty = parse_ty(ty);
            let konst = s.contains("const") && !matches!(ty, Type::ConstPtr(_))
                || s.starts_with("enum")
                || s.rsplit_once(" ").unwrap().1.starts_with("imm");
            (ty, konst)
        })
        .collect::<Vec<_>>();

    Intrinsic {
        name,
        ret,
        instruction,
        arguments,
    }
}

fn parse_ty(s: &str) -> Type {
    if let Some(ty) = s.strip_suffix("*") {
        let ty = ty.trim();
        if let Some(ty) = ty.strip_prefix("const") {
            // SVE intrinsics are west-const (`const int8_t *`)
            Type::ConstPtr(parse_ty_base(ty))
        } else if let Some(ty) = ty.strip_suffix("const") {
            // Neon intrinsics are east-const (`int8_t const *`)
            Type::ConstPtr(parse_ty_base(ty))
        } else {
            Type::MutPtr(parse_ty_base(ty))
        }
    } else {
        *parse_ty_base(s)
    }
}

fn parse_ty_base(s: &str) -> &'static Type {
    let s = s.trim();
    match s {
        "bool" => &BOOL,
        "void" => &VOID,
        "float16_t" => &F16,
        "float16x4_t" => &F16X4,
        "float16x4x2_t" => &F16X4X2,
        "float16x4x3_t" => &F16X4X3,
        "float16x4x4_t" => &F16X4X4,
        "float16x8_t" => &F16X8,
        "float16x8x2_t" => &F16X8X2,
        "float16x8x3_t" => &F16X8X3,
        "float16x8x4_t" => &F16X8X4,
        "float32_t" => &F32,
        "float32x2_t" => &F32X2,
        "float32x2x2_t" => &F32X2X2,
        "float32x2x3_t" => &F32X2X3,
        "float32x2x4_t" => &F32X2X4,
        "float32x4_t" => &F32X4,
        "float32x4x2_t" => &F32X4X2,
        "float32x4x3_t" => &F32X4X3,
        "float32x4x4_t" => &F32X4X4,
        "float64_t" => &F64,
        "float64x1_t" => &F64X1,
        "float64x1x2_t" => &F64X1X2,
        "float64x1x3_t" => &F64X1X3,
        "float64x1x4_t" => &F64X1X4,
        "float64x2_t" => &F64X2,
        "float64x2x2_t" => &F64X2X2,
        "float64x2x3_t" => &F64X2X3,
        "float64x2x4_t" => &F64X2X4,
        "int16_t" => &I16,
        "int16x2_t" => &I16X2,
        "int16x4_t" => &I16X4,
        "int16x4x2_t" => &I16X4X2,
        "int16x4x3_t" => &I16X4X3,
        "int16x4x4_t" => &I16X4X4,
        "int16x8_t" => &I16X8,
        "int16x8x2_t" => &I16X8X2,
        "int16x8x3_t" => &I16X8X3,
        "int16x8x4_t" => &I16X8X4,
        "int32_t" | "int" => &I32,
        "int32x2_t" => &I32X2,
        "int32x2x2_t" => &I32X2X2,
        "int32x2x3_t" => &I32X2X3,
        "int32x2x4_t" => &I32X2X4,
        "int32x4_t" => &I32X4,
        "int32x4x2_t" => &I32X4X2,
        "int32x4x3_t" => &I32X4X3,
        "int32x4x4_t" => &I32X4X4,
        "int64_t" => &I64,
        "int64x1_t" => &I64X1,
        "int64x1x2_t" => &I64X1X2,
        "int64x1x3_t" => &I64X1X3,
        "int64x1x4_t" => &I64X1X4,
        "int64x2_t" => &I64X2,
        "int64x2x2_t" => &I64X2X2,
        "int64x2x3_t" => &I64X2X3,
        "int64x2x4_t" => &I64X2X4,
        "int8_t" => &I8,
        "int8x16_t" => &I8X16,
        "int8x16x2_t" => &I8X16X2,
        "int8x16x3_t" => &I8X16X3,
        "int8x16x4_t" => &I8X16X4,
        "int8x4_t" => &I8X4,
        "int8x8_t" => &I8X8,
        "int8x8x2_t" => &I8X8X2,
        "int8x8x3_t" => &I8X8X3,
        "int8x8x4_t" => &I8X8X4,
        "poly128_t" => &P128,
        "poly16_t" => &P16,
        "poly16x4_t" => &POLY16X4,
        "poly16x4x2_t" => &P16X4X2,
        "poly16x4x3_t" => &P16X4X3,
        "poly16x4x4_t" => &P16X4X4,
        "poly16x8_t" => &POLY16X8,
        "poly16x8x2_t" => &P16X8X2,
        "poly16x8x3_t" => &P16X8X3,
        "poly16x8x4_t" => &P16X8X4,
        "poly64_t" => &P64,
        "poly64x1_t" => &POLY64X1,
        "poly64x1x2_t" => &P64X1X2,
        "poly64x1x3_t" => &P64X1X3,
        "poly64x1x4_t" => &P64X1X4,
        "poly64x2_t" => &POLY64X2,
        "poly64x2x2_t" => &P64X2X2,
        "poly64x2x3_t" => &P64X2X3,
        "poly64x2x4_t" => &P64X2X4,
        "poly8_t" => &P8,
        "poly8x16_t" => &POLY8X16,
        "poly8x16x2_t" => &POLY8X16X2,
        "poly8x16x3_t" => &POLY8X16X3,
        "poly8x16x4_t" => &POLY8X16X4,
        "poly8x8_t" => &POLY8X8,
        "poly8x8x2_t" => &POLY8X8X2,
        "poly8x8x3_t" => &POLY8X8X3,
        "poly8x8x4_t" => &POLY8X8X4,
        "uint16_t" => &U16,
        "uint16x4_t" => &U16X4,
        "uint16x4x2_t" => &U16X4X2,
        "uint16x4x3_t" => &U16X4X3,
        "uint16x4x4_t" => &U16X4X4,
        "uint16x8_t" => &U16X8,
        "uint16x8x2_t" => &U16X8X2,
        "uint16x8x3_t" => &U16X8X3,
        "uint16x8x4_t" => &U16X8X4,
        "uint32_t" => &U32,
        "uint32x2_t" => &U32X2,
        "uint32x2x2_t" => &U32X2X2,
        "uint32x2x3_t" => &U32X2X3,
        "uint32x2x4_t" => &U32X2X4,
        "uint32x4_t" => &U32X4,
        "uint32x4x2_t" => &U32X4X2,
        "uint32x4x3_t" => &U32X4X3,
        "uint32x4x4_t" => &U32X4X4,
        "uint64_t" => &U64,
        "uint64x1_t" => &U64X1,
        "uint64x1x2_t" => &U64X1X2,
        "uint64x1x3_t" => &U64X1X3,
        "uint64x1x4_t" => &U64X1X4,
        "uint64x2_t" => &U64X2,
        "uint64x2x2_t" => &U64X2X2,
        "uint64x2x3_t" => &U64X2X3,
        "uint64x2x4_t" => &U64X2X4,
        "uint8_t" => &U8,
        "uint8x16_t" => &U8X16,
        "uint8x16x2_t" => &U8X16X2,
        "uint8x16x3_t" => &U8X16X3,
        "uint8x16x4_t" => &U8X16X4,
        "uint8x8_t" => &U8X8,
        "uint8x8x2_t" => &U8X8X2,
        "uint8x8x3_t" => &U8X8X3,
        "uint8x8x4_t" => &U8X8X4,
        "svbool_t" => &SVBOOL,
        "svboolx2_t" => &SVBOOLX2,
        "svboolx3_t" => &SVBOOLX3,
        "svboolx4_t" => &SVBOOLX4,
        "svcount_t" => &SVCOUNT,
        "svfloat16_t" => &SVF16,
        "svfloat16x2_t" => &SVF16X2,
        "svfloat16x3_t" => &SVF16X3,
        "svfloat16x4_t" => &SVF16X4,
        "svfloat32_t" => &SVF32,
        "svfloat32x2_t" => &SVF32X2,
        "svfloat32x3_t" => &SVF32X3,
        "svfloat32x4_t" => &SVF32X4,
        "svfloat64_t" => &SVF64,
        "svfloat64x2_t" => &SVF64X2,
        "svfloat64x3_t" => &SVF64X3,
        "svfloat64x4_t" => &SVF64X4,
        "svint8_t" => &SVI8,
        "svint8x2_t" => &SVI8X2,
        "svint8x3_t" => &SVI8X3,
        "svint8x4_t" => &SVI8X4,
        "svint16_t" => &SVI16,
        "svint16x2_t" => &SVI16X2,
        "svint16x3_t" => &SVI16X3,
        "svint16x4_t" => &SVI16X4,
        "svint32_t" => &SVI32,
        "svint32x2_t" => &SVI32X2,
        "svint32x3_t" => &SVI32X3,
        "svint32x4_t" => &SVI32X4,
        "svint64_t" => &SVI64,
        "svint64x2_t" => &SVI64X2,
        "svint64x3_t" => &SVI64X3,
        "svint64x4_t" => &SVI64X4,
        "svuint8_t" => &SVU8,
        "svuint8x2_t" => &SVU8X2,
        "svuint8x3_t" => &SVU8X3,
        "svuint8x4_t" => &SVU8X4,
        "svuint16_t" => &SVU16,
        "svuint16x2_t" => &SVU16X2,
        "svuint16x3_t" => &SVU16X3,
        "svuint16x4_t" => &SVU16X4,
        "svuint32_t" => &SVU32,
        "svuint32x2_t" => &SVU32X2,
        "svuint32x3_t" => &SVU32X3,
        "svuint32x4_t" => &SVU32X4,
        "svuint64_t" => &SVU64,
        "svuint64x2_t" => &SVU64X2,
        "svuint64x3_t" => &SVU64X3,
        "svuint64x4_t" => &SVU64X4,
        "enum svprfop" => &SVPRFOP,
        "enum svpattern" => &SVPATTERN,

        _ => panic!("failed to parse json type {s:?}"),
    }
}

// FIXME(arm-maintainers): Some tests require new rustc intrinsics in order to generate
// the appropriate instruction, though they do have the correct behaviour - these will be fixed
// but are disabled for now.
static SKIP_ASSERT_INSTR_TESTS: &'static [&'static str] = &["svpfalse_b"];

// FIXME(arm-maintainers): With the advent of the `intrinsic-test` tool, new tests of this kind
// are no longer being added and just adding to this list indefinitely isn't the best solution for
// dealing with that.
static SKIP_RUNTIME_TESTS: &'static [&'static str] = &[
    "vaddq_s64",
    "vaddq_u64",
    "vrsqrte_f32",
    "vtbl1_s8",
    "vtbl1_u8",
    "vtbl1_p8",
    "vtbl2_s8",
    "vtbl2_u8",
    "vtbl2_p8",
    "vtbl3_s8",
    "vtbl3_u8",
    "vtbl3_p8",
    "vtbl4_s8",
    "vtbl4_u8",
    "vtbl4_p8",
    "vtbx1_s8",
    "vtbx1_u8",
    "vtbx1_p8",
    "vtbx2_s8",
    "vtbx2_u8",
    "vtbx2_p8",
    "vtbx3_s8",
    "vtbx3_u8",
    "vtbx3_p8",
    "vtbx4_s8",
    "vtbx4_u8",
    "vtbx4_p8",
    "udf",
    "_clz_u8",
    "_clz_u16",
    "_clz_u32",
    "_rbit_u32",
    "_rev_u16",
    "_rev_u32",
    "__breakpoint",
    "vpminq_f32",
    "vpminq_f64",
    "vpmaxq_f32",
    "vpmaxq_f64",
    "vcombine_s8",
    "vcombine_s16",
    "vcombine_s32",
    "vcombine_s64",
    "vcombine_u8",
    "vcombine_u16",
    "vcombine_u32",
    "vcombine_u64",
    "vcombine_p64",
    "vcombine_f32",
    "vcombine_p8",
    "vcombine_p16",
    "vcombine_f64",
    "vtbl1_s8",
    "vtbl1_u8",
    "vtbl1_p8",
    "vtbl2_s8",
    "vtbl2_u8",
    "vtbl2_p8",
    "vtbl3_s8",
    "vtbl3_u8",
    "vtbl3_p8",
    "vtbl4_s8",
    "vtbl4_u8",
    "vtbl4_p8",
    "vtbx1_s8",
    "vtbx1_u8",
    "vtbx1_p8",
    "vtbx2_s8",
    "vtbx2_u8",
    "vtbx2_p8",
    "vtbx3_s8",
    "vtbx3_u8",
    "vtbx3_p8",
    "vtbx4_s8",
    "vtbx4_u8",
    "vtbx4_p8",
    "vqtbl1_s8",
    "vqtbl1q_s8",
    "vqtbl1_u8",
    "vqtbl1q_u8",
    "vqtbl1_p8",
    "vqtbl1q_p8",
    "vqtbx1_s8",
    "vqtbx1q_s8",
    "vqtbx1_u8",
    "vqtbx1q_u8",
    "vqtbx1_p8",
    "vqtbx1q_p8",
    "vqtbl2_s8",
    "vqtbl2q_s8",
    "vqtbl2_u8",
    "vqtbl2q_u8",
    "vqtbl2_p8",
    "vqtbl2q_p8",
    "vqtbx2_s8",
    "vqtbx2q_s8",
    "vqtbx2_u8",
    "vqtbx2q_u8",
    "vqtbx2_p8",
    "vqtbx2q_p8",
    "vqtbl3_s8",
    "vqtbl3q_s8",
    "vqtbl3_u8",
    "vqtbl3q_u8",
    "vqtbl3_p8",
    "vqtbl3q_p8",
    "vqtbx3_s8",
    "vqtbx3q_s8",
    "vqtbx3_u8",
    "vqtbx3q_u8",
    "vqtbx3_p8",
    "vqtbx3q_p8",
    "vqtbl4_s8",
    "vqtbl4q_s8",
    "vqtbl4_u8",
    "vqtbl4q_u8",
    "vqtbl4_p8",
    "vqtbl4q_p8",
    "vqtbx4_s8",
    "vqtbx4q_s8",
    "vqtbx4_u8",
    "vqtbx4q_u8",
    "vqtbx4_p8",
    "vqtbx4q_p8",
    "brk",
    "_rev_u64",
    "_clz_u64",
    "_rbit_u64",
    "_cls_u32",
    "_cls_u64",
    "_prefetch",
    "vsli_n_s8",
    "vsliq_n_s8",
    "vsli_n_s16",
    "vsliq_n_s16",
    "vsli_n_s32",
    "vsliq_n_s32",
    "vsli_n_s64",
    "vsliq_n_s64",
    "vsli_n_u8",
    "vsliq_n_u8",
    "vsli_n_u16",
    "vsliq_n_u16",
    "vsli_n_u32",
    "vsliq_n_u32",
    "vsli_n_u64",
    "vsliq_n_u64",
    "vsli_n_p8",
    "vsliq_n_p8",
    "vsli_n_p16",
    "vsliq_n_p16",
    "vsli_n_p64",
    "vsliq_n_p64",
    "vsri_n_s8",
    "vsriq_n_s8",
    "vsri_n_s16",
    "vsriq_n_s16",
    "vsri_n_s32",
    "vsriq_n_s32",
    "vsri_n_s64",
    "vsriq_n_s64",
    "vsri_n_u8",
    "vsriq_n_u8",
    "vsri_n_u16",
    "vsriq_n_u16",
    "vsri_n_u32",
    "vsriq_n_u32",
    "vsri_n_u64",
    "vsriq_n_u64",
    "vsri_n_p8",
    "vsriq_n_p8",
    "vsri_n_p16",
    "vsriq_n_p16",
    "vsri_n_p64",
    "vsriq_n_p64",
    "__smulbb",
    "__smultb",
    "__smulbt",
    "__smultt",
    "__smulwb",
    "__smulwt",
    "__qadd",
    "__qsub",
    "__qdbl",
    "__smlabb",
    "__smlabt",
    "__smlatb",
    "__smlatt",
    "__smlawb",
    "__smlawt",
    "__qadd8",
    "__qsub8",
    "__qsub16",
    "__qadd16",
    "__qasx",
    "__qsax",
    "__sadd16",
    "__sadd8",
    "__smlad",
    "__smlsd",
    "__sasx",
    "__sel",
    "__shadd8",
    "__shadd16",
    "__shsub8",
    "__usub8",
    "__ssub8",
    "__shsub16",
    "__smuad",
    "__smuadx",
    "__smusd",
    "__smusdx",
    "__usad8",
    "__usada8",
    "__ldrex",
    "__strex",
    "__ldrexb",
    "__strexb",
    "__ldrexh",
    "__strexh",
    "__clrex",
    "__dbg",
    "__crc32cd",
    "__crc32d",
    "__jcvt",
    "vabal_high_s8",
    "vabal_high_s16",
    "vabal_high_s32",
    "vabal_high_u8",
    "vabal_high_u16",
    "vabal_high_u32",
    "vabd_f64",
    "vabdq_f64",
    "vabdd_f64",
    "vabds_f32",
    "vabdh_f16",
    "vabdl_high_s16",
    "vabdl_high_s32",
    "vabdl_high_s8",
    "vabdl_high_u8",
    "vabdl_high_u16",
    "vabdl_high_u32",
    "vabs_f64",
    "vabsq_f64",
    "vabs_s64",
    "vabsq_s64",
    "vabsd_s64",
    "vaddlv_s16",
    "vaddlvq_s16",
    "vaddlvq_s32",
    "vaddlv_s32",
    "vaddlv_s8",
    "vaddlvq_s8",
    "vaddlv_u16",
    "vaddlvq_u16",
    "vaddlvq_u32",
    "vaddlv_u32",
    "vaddlv_u8",
    "vaddlvq_u8",
    "vaddv_f32",
    "vaddvq_f32",
    "vaddvq_f64",
    "vaddv_s32",
    "vaddv_s8",
    "vaddvq_s8",
    "vaddv_s16",
    "vaddvq_s16",
    "vaddvq_s32",
    "vaddv_u32",
    "vaddv_u8",
    "vaddvq_u8",
    "vaddv_u16",
    "vaddvq_u16",
    "vaddvq_u32",
    "vaddvq_s64",
    "vaddvq_u64",
    "vamax_f16",
    "vamaxq_f16",
    "vamax_f32",
    "vamaxq_f32",
    "vamaxq_f64",
    "vamin_f16",
    "vaminq_f16",
    "vamin_f32",
    "vaminq_f32",
    "vaminq_f64",
    "vbcaxq_s8",
    "vbcaxq_s16",
    "vbcaxq_s32",
    "vbcaxq_s64",
    "vbcaxq_u8",
    "vbcaxq_u16",
    "vbcaxq_u32",
    "vbcaxq_u64",
    "vcadd_rot270_f16",
    "vcaddq_rot270_f16",
    "vcadd_rot270_f32",
    "vcaddq_rot270_f32",
    "vcaddq_rot270_f64",
    "vcadd_rot90_f16",
    "vcaddq_rot90_f16",
    "vcadd_rot90_f32",
    "vcaddq_rot90_f32",
    "vcaddq_rot90_f64",
    "vcage_f64",
    "vcageq_f64",
    "vcaged_f64",
    "vcages_f32",
    "vcageh_f16",
    "vcagt_f64",
    "vcagtq_f64",
    "vcagtd_f64",
    "vcagts_f32",
    "vcagth_f16",
    "vcale_f64",
    "vcaleq_f64",
    "vcaled_f64",
    "vcales_f32",
    "vcaleh_f16",
    "vcalt_f64",
    "vcaltq_f64",
    "vcaltd_f64",
    "vcalts_f32",
    "vcalth_f16",
    "vceq_f64",
    "vceqq_f64",
    "vceq_s64",
    "vceqq_s64",
    "vceq_u64",
    "vceqq_u64",
    "vceq_p64",
    "vceqq_p64",
    "vceqd_f64",
    "vceqs_f32",
    "vceqd_s64",
    "vceqd_u64",
    "vceqh_f16",
    "vceqz_f16",
    "vceqzq_f16",
    "vceqz_f32",
    "vceqzq_f32",
    "vceqz_f64",
    "vceqzq_f64",
    "vceqz_s8",
    "vceqzq_s8",
    "vceqz_s16",
    "vceqzq_s16",
    "vceqz_s32",
    "vceqzq_s32",
    "vceqz_s64",
    "vceqzq_s64",
    "vceqz_p8",
    "vceqzq_p8",
    "vceqz_p64",
    "vceqzq_p64",
    "vceqz_u8",
    "vceqzq_u8",
    "vceqz_u16",
    "vceqzq_u16",
    "vceqz_u32",
    "vceqzq_u32",
    "vceqz_u64",
    "vceqzq_u64",
    "vceqzd_s64",
    "vceqzd_u64",
    "vceqzh_f16",
    "vceqzs_f32",
    "vceqzd_f64",
    "vcge_f64",
    "vcgeq_f64",
    "vcge_s64",
    "vcgeq_s64",
    "vcge_u64",
    "vcgeq_u64",
    "vcged_f64",
    "vcges_f32",
    "vcged_s64",
    "vcged_u64",
    "vcgeh_f16",
    "vcgez_f32",
    "vcgezq_f32",
    "vcgez_f64",
    "vcgezq_f64",
    "vcgez_s8",
    "vcgezq_s8",
    "vcgez_s16",
    "vcgezq_s16",
    "vcgez_s32",
    "vcgezq_s32",
    "vcgez_s64",
    "vcgezq_s64",
    "vcgezd_f64",
    "vcgezs_f32",
    "vcgezd_s64",
    "vcgezh_f16",
    "vcgt_f64",
    "vcgtq_f64",
    "vcgt_s64",
    "vcgtq_s64",
    "vcgt_u64",
    "vcgtq_u64",
    "vcgtd_f64",
    "vcgts_f32",
    "vcgtd_s64",
    "vcgtd_u64",
    "vcgth_f16",
    "vcgtz_f32",
    "vcgtzq_f32",
    "vcgtz_f64",
    "vcgtzq_f64",
    "vcgtz_s8",
    "vcgtzq_s8",
    "vcgtz_s16",
    "vcgtzq_s16",
    "vcgtz_s32",
    "vcgtzq_s32",
    "vcgtz_s64",
    "vcgtzq_s64",
    "vcgtzd_f64",
    "vcgtzs_f32",
    "vcgtzd_s64",
    "vcgtzh_f16",
    "vcle_f64",
    "vcleq_f64",
    "vcle_s64",
    "vcleq_s64",
    "vcle_u64",
    "vcleq_u64",
    "vcled_f64",
    "vcles_f32",
    "vcled_u64",
    "vcled_s64",
    "vcleh_f16",
    "vclez_f32",
    "vclezq_f32",
    "vclez_f64",
    "vclezq_f64",
    "vclez_s8",
    "vclezq_s8",
    "vclez_s16",
    "vclezq_s16",
    "vclez_s32",
    "vclezq_s32",
    "vclez_s64",
    "vclezq_s64",
    "vclezd_f64",
    "vclezs_f32",
    "vclezd_s64",
    "vclezh_f16",
    "vclt_f64",
    "vcltq_f64",
    "vclt_s64",
    "vcltq_s64",
    "vclt_u64",
    "vcltq_u64",
    "vcltd_u64",
    "vcltd_s64",
    "vclth_f16",
    "vclts_f32",
    "vcltd_f64",
    "vcltz_f32",
    "vcltzq_f32",
    "vcltz_f64",
    "vcltzq_f64",
    "vcltz_s8",
    "vcltzq_s8",
    "vcltz_s16",
    "vcltzq_s16",
    "vcltz_s32",
    "vcltzq_s32",
    "vcltz_s64",
    "vcltzq_s64",
    "vcltzd_f64",
    "vcltzs_f32",
    "vcltzd_s64",
    "vcltzh_f16",
    "vcmla_f16",
    "vcmlaq_f16",
    "vcmla_f32",
    "vcmlaq_f32",
    "vcmlaq_f64",
    "vcmla_lane_f16",
    "vcmlaq_lane_f16",
    "vcmla_lane_f32",
    "vcmlaq_lane_f32",
    "vcmla_laneq_f16",
    "vcmlaq_laneq_f16",
    "vcmla_laneq_f32",
    "vcmlaq_laneq_f32",
    "vcmla_rot180_f16",
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    "vld1_p8_x4",
    "vld1q_p8_x2",
    "vld1q_p8_x3",
    "vld1q_p8_x4",
    "vld1_p16_x2",
    "vld1_p16_x3",
    "vld1_p16_x4",
    "vld1q_p16_x2",
    "vld1q_p16_x3",
    "vld1q_p16_x4",
    "vld2_dup_f16",
    "vld2q_dup_f16",
    "vld2_dup_f16",
    "vld2q_dup_f16",
    "vld2_dup_f32",
    "vld2q_dup_f32",
    "vld2_dup_s8",
    "vld2q_dup_s8",
    "vld2_dup_s16",
    "vld2q_dup_s16",
    "vld2_dup_s32",
    "vld2q_dup_s32",
    "vld2_dup_f32",
    "vld2q_dup_f32",
    "vld2_dup_s8",
    "vld2q_dup_s8",
    "vld2_dup_s16",
    "vld2q_dup_s16",
    "vld2_dup_s32",
    "vld2q_dup_s32",
    "vld2_dup_p64",
    "vld2_dup_s64",
    "vld2_dup_s64",
    "vld2_dup_u64",
    "vld2_dup_u8",
    "vld2_dup_u8",
    "vld2q_dup_u8",
    "vld2q_dup_u8",
    "vld2_dup_u16",
    "vld2_dup_u16",
    "vld2q_dup_u16",
    "vld2q_dup_u16",
    "vld2_dup_u32",
    "vld2_dup_u32",
    "vld2q_dup_u32",
    "vld2q_dup_u32",
    "vld2_dup_p8",
    "vld2_dup_p8",
    "vld2q_dup_p8",
    "vld2q_dup_p8",
    "vld2_dup_p16",
    "vld2_dup_p16",
    "vld2q_dup_p16",
    "vld2q_dup_p16",
    "vld2_f16",
    "vld2q_f16",
    "vld2_f16",
    "vld2q_f16",
    "vld2_f32",
    "vld2q_f32",
    "vld2_s8",
    "vld2q_s8",
    "vld2_s16",
    "vld2q_s16",
    "vld2_s32",
    "vld2q_s32",
    "vld2_f32",
    "vld2q_f32",
    "vld2_s8",
    "vld2q_s8",
    "vld2_s16",
    "vld2q_s16",
    "vld2_s32",
    "vld2q_s32",
    "vld2_lane_f16",
    "vld2q_lane_f16",
    "vld2_lane_f16",
    "vld2q_lane_f16",
    "vld2_lane_f32",
    "vld2q_lane_f32",
    "vld2_lane_s8",
    "vld2_lane_s16",
    "vld2q_lane_s16",
    "vld2_lane_s32",
    "vld2q_lane_s32",
    "vld2_lane_f32",
    "vld2q_lane_f32",
    "vld2q_lane_s16",
    "vld2q_lane_s32",
    "vld2_lane_s8",
    "vld2_lane_s16",
    "vld2_lane_s32",
    "vld2_lane_u8",
    "vld2_lane_u16",
    "vld2q_lane_u16",
    "vld2_lane_u32",
    "vld2q_lane_u32",
    "vld2_lane_p8",
    "vld2_lane_p16",
    "vld2q_lane_p16",
    "vld2_p64",
    "vld2_s64",
    "vld2_s64",
    "vld2_u64",
    "vld2_u8",
    "vld2q_u8",
    "vld2_u16",
    "vld2q_u16",
    "vld2_u32",
    "vld2q_u32",
    "vld2_p8",
    "vld2q_p8",
    "vld2_p16",
    "vld2q_p16",
    "vld3_dup_f16",
    "vld3q_dup_f16",
    "vld3_dup_f16",
    "vld3q_dup_f16",
    "vld3_dup_f32",
    "vld3q_dup_f32",
    "vld3_dup_s8",
    "vld3q_dup_s8",
    "vld3_dup_s16",
    "vld3q_dup_s16",
    "vld3_dup_s32",
    "vld3q_dup_s32",
    "vld3_dup_s64",
    "vld3_dup_f32",
    "vld3q_dup_f32",
    "vld3_dup_s8",
    "vld3q_dup_s8",
    "vld3_dup_s16",
    "vld3q_dup_s16",
    "vld3_dup_s32",
    "vld3q_dup_s32",
    "vld3_dup_p64",
    "vld3_dup_s64",
    "vld3_dup_u64",
    "vld3_dup_u8",
    "vld3_dup_u8",
    "vld3q_dup_u8",
    "vld3q_dup_u8",
    "vld3_dup_u16",
    "vld3_dup_u16",
    "vld3q_dup_u16",
    "vld3q_dup_u16",
    "vld3_dup_u32",
    "vld3_dup_u32",
    "vld3q_dup_u32",
    "vld3q_dup_u32",
    "vld3_dup_p8",
    "vld3_dup_p8",
    "vld3q_dup_p8",
    "vld3q_dup_p8",
    "vld3_dup_p16",
    "vld3_dup_p16",
    "vld3q_dup_p16",
    "vld3q_dup_p16",
    "vld3_f16",
    "vld3q_f16",
    "vld3_f16",
    "vld3q_f16",
    "vld3_f32",
    "vld3q_f32",
    "vld3_s8",
    "vld3q_s8",
    "vld3_s16",
    "vld3q_s16",
    "vld3_s32",
    "vld3q_s32",
    "vld3_f32",
    "vld3q_f32",
    "vld3_s8",
    "vld3q_s8",
    "vld3_s16",
    "vld3q_s16",
    "vld3_s32",
    "vld3q_s32",
    "vld3_lane_f16",
    "vld3q_lane_f16",
    "vld3_lane_f16",
    "vld3q_lane_f16",
    "vld3_lane_f32",
    "vld3q_lane_f32",
    "vld3_lane_f32",
    "vld3_lane_s8",
    "vld3_lane_s16",
    "vld3q_lane_s16",
    "vld3_lane_s32",
    "vld3q_lane_s32",
    "vld3_lane_s8",
    "vld3_lane_s16",
    "vld3q_lane_s16",
    "vld3_lane_s32",
    "vld3q_lane_s32",
    "vld3_lane_u8",
    "vld3_lane_u16",
    "vld3q_lane_u16",
    "vld3_lane_u32",
    "vld3q_lane_u32",
    "vld3_lane_p8",
    "vld3_lane_p16",
    "vld3q_lane_p16",
    "vld3_p64",
    "vld3_s64",
    "vld3_s64",
    "vld3_u64",
    "vld3_u8",
    "vld3q_u8",
    "vld3_u16",
    "vld3q_u16",
    "vld3_u32",
    "vld3q_u32",
    "vld3_p8",
    "vld3q_p8",
    "vld3_p16",
    "vld3q_p16",
    "vld3q_lane_f32",
    "vld4_dup_f16",
    "vld4q_dup_f16",
    "vld4_dup_f16",
    "vld4q_dup_f16",
    "vld4_dup_f32",
    "vld4q_dup_f32",
    "vld4_dup_s8",
    "vld4q_dup_s8",
    "vld4_dup_s16",
    "vld4q_dup_s16",
    "vld4_dup_s32",
    "vld4q_dup_s32",
    "vld4_dup_f32",
    "vld4q_dup_f32",
    "vld4_dup_s8",
    "vld4q_dup_s8",
    "vld4_dup_s16",
    "vld4q_dup_s16",
    "vld4_dup_s32",
    "vld4q_dup_s32",
    "vld4_dup_s64",
    "vld4_dup_p64",
    "vld4_dup_s64",
    "vld4_dup_u64",
    "vld4_dup_u8",
    "vld4_dup_u8",
    "vld4q_dup_u8",
    "vld4q_dup_u8",
    "vld4_dup_u16",
    "vld4_dup_u16",
    "vld4q_dup_u16",
    "vld4q_dup_u16",
    "vld4_dup_u32",
    "vld4_dup_u32",
    "vld4q_dup_u32",
    "vld4q_dup_u32",
    "vld4_dup_p8",
    "vld4_dup_p8",
    "vld4q_dup_p8",
    "vld4q_dup_p8",
    "vld4_dup_p16",
    "vld4_dup_p16",
    "vld4q_dup_p16",
    "vld4q_dup_p16",
    "vld4_f16",
    "vld4q_f16",
    "vld4_f16",
    "vld4q_f16",
    "vld4_f32",
    "vld4q_f32",
    "vld4_s8",
    "vld4q_s8",
    "vld4_s16",
    "vld4q_s16",
    "vld4_s32",
    "vld4q_s32",
    "vld4_f32",
    "vld4q_f32",
    "vld4_s8",
    "vld4q_s8",
    "vld4_s16",
    "vld4q_s16",
    "vld4_s32",
    "vld4q_s32",
    "vld4_lane_f16",
    "vld4q_lane_f16",
    "vld4_lane_f16",
    "vld4q_lane_f16",
    "vld4_lane_f32",
    "vld4q_lane_f32",
    "vld4_lane_s8",
    "vld4_lane_s16",
    "vld4q_lane_s16",
    "vld4_lane_s32",
    "vld4q_lane_s32",
    "vld4_lane_f32",
    "vld4q_lane_f32",
    "vld4_lane_s8",
    "vld4_lane_s16",
    "vld4q_lane_s16",
    "vld4_lane_s32",
    "vld4q_lane_s32",
    "vld4_lane_u8",
    "vld4_lane_u16",
    "vld4q_lane_u16",
    "vld4_lane_u32",
    "vld4q_lane_u32",
    "vld4_lane_p8",
    "vld4_lane_p16",
    "vld4q_lane_p16",
    "vld4_p64",
    "vld4_s64",
    "vld4_s64",
    "vld4_u64",
    "vld4_u8",
    "vld4q_u8",
    "vld4_u16",
    "vld4q_u16",
    "vld4_u32",
    "vld4q_u32",
    "vld4_p8",
    "vld4q_p8",
    "vld4_p16",
    "vld4q_p16",
    "vmax_f16",
    "vmaxq_f16",
    "vmax_f32",
    "vmaxq_f32",
    "vmax_s8",
    "vmaxq_s8",
    "vmax_s16",
    "vmaxq_s16",
    "vmax_s32",
    "vmaxq_s32",
    "vmax_u8",
    "vmaxq_u8",
    "vmax_u16",
    "vmaxq_u16",
    "vmax_u32",
    "vmaxq_u32",
    "vmaxnm_f16",
    "vmaxnmq_f16",
    "vmaxnm_f32",
    "vmaxnmq_f32",
    "vmin_f16",
    "vminq_f16",
    "vmin_f32",
    "vminq_f32",
    "vmin_s8",
    "vminq_s8",
    "vmin_s16",
    "vminq_s16",
    "vmin_s32",
    "vminq_s32",
    "vmin_u8",
    "vminq_u8",
    "vmin_u16",
    "vminq_u16",
    "vmin_u32",
    "vminq_u32",
    "vminnm_f16",
    "vminnmq_f16",
    "vminnm_f32",
    "vminnmq_f32",
    "vmla_f32",
    "vmlaq_f32",
    "vmla_lane_f32",
    "vmla_laneq_f32",
    "vmlaq_lane_f32",
    "vmlaq_laneq_f32",
    "vmla_lane_s16",
    "vmla_lane_u16",
    "vmla_laneq_s16",
    "vmla_laneq_u16",
    "vmlaq_lane_s16",
    "vmlaq_lane_u16",
    "vmlaq_laneq_s16",
    "vmlaq_laneq_u16",
    "vmla_lane_s32",
    "vmla_lane_u32",
    "vmla_laneq_s32",
    "vmla_laneq_u32",
    "vmlaq_lane_s32",
    "vmlaq_lane_u32",
    "vmlaq_laneq_s32",
    "vmlaq_laneq_u32",
    "vmla_n_f32",
    "vmlaq_n_f32",
    "vmla_n_s16",
    "vmlaq_n_s16",
    "vmla_n_u16",
    "vmlaq_n_u16",
    "vmla_n_s32",
    "vmlaq_n_s32",
    "vmla_n_u32",
    "vmlaq_n_u32",
    "vmla_s8",
    "vmlaq_s8",
    "vmla_s16",
    "vmlaq_s16",
    "vmla_s32",
    "vmlaq_s32",
    "vmla_u8",
    "vmlaq_u8",
    "vmla_u16",
    "vmlaq_u16",
    "vmla_u32",
    "vmlaq_u32",
    "vmlal_lane_s16",
    "vmlal_laneq_s16",
    "vmlal_lane_s32",
    "vmlal_laneq_s32",
    "vmlal_lane_u16",
    "vmlal_laneq_u16",
    "vmlal_lane_u32",
    "vmlal_laneq_u32",
    "vmlal_n_s16",
    "vmlal_n_s32",
    "vmlal_n_u16",
    "vmlal_n_u32",
    "vmlal_s8",
    "vmlal_s16",
    "vmlal_s32",
    "vmlal_u8",
    "vmlal_u16",
    "vmlal_u32",
    "vmls_f32",
    "vmlsq_f32",
    "vmls_lane_f32",
    "vmls_laneq_f32",
    "vmlsq_lane_f32",
    "vmlsq_laneq_f32",
    "vmls_lane_s16",
    "vmls_lane_u16",
    "vmls_laneq_s16",
    "vmls_laneq_u16",
    "vmlsq_lane_s16",
    "vmlsq_lane_u16",
    "vmlsq_laneq_s16",
    "vmlsq_laneq_u16",
    "vmls_lane_s32",
    "vmls_lane_u32",
    "vmls_laneq_s32",
    "vmls_laneq_u32",
    "vmlsq_lane_s32",
    "vmlsq_lane_u32",
    "vmlsq_laneq_s32",
    "vmlsq_laneq_u32",
    "vmls_n_f32",
    "vmlsq_n_f32",
    "vmls_n_s16",
    "vmlsq_n_s16",
    "vmls_n_u16",
    "vmlsq_n_u16",
    "vmls_n_s32",
    "vmlsq_n_s32",
    "vmls_n_u32",
    "vmlsq_n_u32",
    "vmls_s8",
    "vmlsq_s8",
    "vmls_s16",
    "vmlsq_s16",
    "vmls_s32",
    "vmlsq_s32",
    "vmls_u8",
    "vmlsq_u8",
    "vmls_u16",
    "vmlsq_u16",
    "vmls_u32",
    "vmlsq_u32",
    "vmlsl_lane_s16",
    "vmlsl_laneq_s16",
    "vmlsl_lane_s32",
    "vmlsl_laneq_s32",
    "vmlsl_lane_u16",
    "vmlsl_laneq_u16",
    "vmlsl_lane_u32",
    "vmlsl_laneq_u32",
    "vmlsl_n_s16",
    "vmlsl_n_s32",
    "vmlsl_n_u16",
    "vmlsl_n_u32",
    "vmlsl_s8",
    "vmlsl_s16",
    "vmlsl_s32",
    "vmlsl_u8",
    "vmlsl_u16",
    "vmlsl_u32",
    "vmmlaq_s32",
    "vmmlaq_u32",
    "vmov_n_f16",
    "vmovq_n_f16",
    "vmul_f16",
    "vmulq_f16",
    "vmul_lane_f16",
    "vmulq_lane_f16",
    "vmul_lane_f32",
    "vmul_laneq_f32",
    "vmulq_lane_f32",
    "vmulq_laneq_f32",
    "vmul_lane_s16",
    "vmulq_lane_s16",
    "vmul_lane_s32",
    "vmulq_lane_s32",
    "vmul_lane_u16",
    "vmulq_lane_u16",
    "vmul_lane_u32",
    "vmulq_lane_u32",
    "vmul_laneq_s16",
    "vmulq_laneq_s16",
    "vmul_laneq_s32",
    "vmulq_laneq_s32",
    "vmul_laneq_u16",
    "vmulq_laneq_u16",
    "vmul_laneq_u32",
    "vmulq_laneq_u32",
    "vmul_n_f16",
    "vmulq_n_f16",
    "vmul_n_f32",
    "vmulq_n_f32",
    "vmul_n_s16",
    "vmulq_n_s16",
    "vmul_n_s32",
    "vmulq_n_s32",
    "vmul_n_u16",
    "vmulq_n_u16",
    "vmul_n_u32",
    "vmulq_n_u32",
    "vmul_p8",
    "vmulq_p8",
    "vmull_lane_s16",
    "vmull_laneq_s16",
    "vmull_lane_s32",
    "vmull_laneq_s32",
    "vmull_lane_u16",
    "vmull_laneq_u16",
    "vmull_lane_u32",
    "vmull_laneq_u32",
    "vmull_n_s16",
    "vmull_n_s32",
    "vmull_n_u16",
    "vmull_n_u32",
    "vmull_p8",
    "vmull_s16",
    "vmull_s32",
    "vmull_s8",
    "vmull_u8",
    "vmull_u16",
    "vmull_u32",
    "vneg_f16",
    "vnegq_f16",
    "vneg_f32",
    "vnegq_f32",
    "vneg_s8",
    "vnegq_s8",
    "vneg_s16",
    "vnegq_s16",
    "vneg_s32",
    "vnegq_s32",
    "vpadal_s8",
    "vpadalq_s8",
    "vpadal_s16",
    "vpadalq_s16",
    "vpadal_s32",
    "vpadalq_s32",
    "vpadal_u8",
    "vpadalq_u8",
    "vpadal_u16",
    "vpadalq_u16",
    "vpadal_u32",
    "vpadalq_u32",
    "vpadd_f16",
    "vpadd_f32",
    "vpadd_s8",
    "vpadd_s16",
    "vpadd_s32",
    "vpadd_u8",
    "vpadd_u8",
    "vpadd_u16",
    "vpadd_u16",
    "vpadd_u32",
    "vpadd_u32",
    "vpaddl_s8",
    "vpaddlq_s8",
    "vpaddl_s16",
    "vpaddlq_s16",
    "vpaddl_s32",
    "vpaddlq_s32",
    "vpaddl_u8",
    "vpaddlq_u8",
    "vpaddl_u16",
    "vpaddlq_u16",
    "vpaddl_u32",
    "vpaddlq_u32",
    "vpmax_f32",
    "vpmax_s8",
    "vpmax_s16",
    "vpmax_s32",
    "vpmax_u8",
    "vpmax_u16",
    "vpmax_u32",
    "vpmin_f32",
    "vpmin_s8",
    "vpmin_s16",
    "vpmin_s32",
    "vpmin_u8",
    "vpmin_u16",
    "vpmin_u32",
    "vqabs_s8",
    "vqabsq_s8",
    "vqabs_s16",
    "vqabsq_s16",
    "vqabs_s32",
    "vqabsq_s32",
    "vqadd_s64",
    "vqaddq_s64",
    "vqadd_u64",
    "vqaddq_u64",
    "vqdmlal_lane_s16",
    "vqdmlal_lane_s32",
    "vqdmlal_n_s16",
    "vqdmlal_n_s32",
    "vqdmlal_s16",
    "vqdmlal_s32",
    "vqdmlsl_lane_s16",
    "vqdmlsl_lane_s32",
    "vqdmlsl_n_s16",
    "vqdmlsl_n_s32",
    "vqdmlsl_s16",
    "vqdmlsl_s32",
    "vqdmulh_laneq_s16",
    "vqdmulhq_laneq_s16",
    "vqdmulh_laneq_s32",
    "vqdmulhq_laneq_s32",
    "vqdmulh_n_s16",
    "vqdmulhq_n_s16",
    "vqdmulh_n_s32",
    "vqdmulhq_n_s32",
    "vqdmulh_s16",
    "vqdmulhq_s16",
    "vqdmulh_s32",
    "vqdmulhq_s32",
    "vqdmull_lane_s16",
    "vqdmull_lane_s32",
    "vqdmull_n_s16",
    "vqdmull_n_s32",
    "vqdmull_s16",
    "vqdmull_s32",
    "vqmovn_s16",
    "vqmovn_s32",
    "vqmovn_s64",
    "vqmovn_u16",
    "vqmovn_u32",
    "vqmovn_u64",
    "vqmovun_s16",
    "vqmovun_s32",
    "vqmovun_s64",
    "vqneg_s8",
    "vqnegq_s8",
    "vqneg_s16",
    "vqnegq_s16",
    "vqneg_s32",
    "vqnegq_s32",
    "vqrdmulh_lane_s16",
    "vqrdmulh_lane_s32",
    "vqrdmulh_laneq_s16",
    "vqrdmulh_laneq_s32",
    "vqrdmulhq_lane_s16",
    "vqrdmulhq_lane_s32",
    "vqrdmulhq_laneq_s16",
    "vqrdmulhq_laneq_s32",
    "vqrdmulh_n_s16",
    "vqrdmulhq_n_s16",
    "vqrdmulh_n_s32",
    "vqrdmulhq_n_s32",
    "vqrdmulh_s16",
    "vqrdmulhq_s16",
    "vqrdmulh_s32",
    "vqrdmulhq_s32",
    "vqrshl_s8",
    "vqrshlq_s8",
    "vqrshl_s16",
    "vqrshlq_s16",
    "vqrshl_s32",
    "vqrshlq_s32",
    "vqrshl_s64",
    "vqrshlq_s64",
    "vqrshl_u8",
    "vqrshlq_u8",
    "vqrshl_u16",
    "vqrshlq_u16",
    "vqrshl_u32",
    "vqrshlq_u32",
    "vqrshl_u64",
    "vqrshlq_u64",
    "vqrshrn_n_s16",
    "vqrshrn_n_s32",
    "vqrshrn_n_s64",
    "vqrshrn_n_s16",
    "vqrshrn_n_s32",
    "vqrshrn_n_s64",
    "vqrshrn_n_u16",
    "vqrshrn_n_u32",
    "vqrshrn_n_u64",
    "vqrshrn_n_u16",
    "vqrshrn_n_u32",
    "vqrshrn_n_u64",
    "vqrshrun_n_s16",
    "vqrshrun_n_s32",
    "vqrshrun_n_s64",
    "vqrshrun_n_s16",
    "vqrshrun_n_s32",
    "vqrshrun_n_s64",
    "vqshl_n_s8",
    "vqshlq_n_s8",
    "vqshl_n_s16",
    "vqshlq_n_s16",
    "vqshl_n_s32",
    "vqshlq_n_s32",
    "vqshl_n_s64",
    "vqshlq_n_s64",
    "vqshl_n_u8",
    "vqshlq_n_u8",
    "vqshl_n_u16",
    "vqshlq_n_u16",
    "vqshl_n_u32",
    "vqshlq_n_u32",
    "vqshl_n_u64",
    "vqshlq_n_u64",
    "vqshl_s8",
    "vqshlq_s8",
    "vqshl_s16",
    "vqshlq_s16",
    "vqshl_s32",
    "vqshlq_s32",
    "vqshl_s64",
    "vqshlq_s64",
    "vqshl_u8",
    "vqshlq_u8",
    "vqshl_u16",
    "vqshlq_u16",
    "vqshl_u32",
    "vqshlq_u32",
    "vqshl_u64",
    "vqshlq_u64",
    "vqshlu_n_s8",
    "vqshluq_n_s8",
    "vqshlu_n_s16",
    "vqshluq_n_s16",
    "vqshlu_n_s32",
    "vqshluq_n_s32",
    "vqshlu_n_s64",
    "vqshluq_n_s64",
    "vqshlu_n_s8",
    "vqshluq_n_s8",
    "vqshlu_n_s16",
    "vqshluq_n_s16",
    "vqshlu_n_s32",
    "vqshluq_n_s32",
    "vqshlu_n_s64",
    "vqshluq_n_s64",
    "vqshrn_n_s16",
    "vqshrn_n_s32",
    "vqshrn_n_s64",
    "vqshrn_n_s16",
    "vqshrn_n_s32",
    "vqshrn_n_s64",
    "vqshrn_n_u16",
    "vqshrn_n_u32",
    "vqshrn_n_u64",
    "vqshrn_n_u16",
    "vqshrn_n_u32",
    "vqshrn_n_u64",
    "vqshrun_n_s16",
    "vqshrun_n_s32",
    "vqshrun_n_s64",
    "vqshrun_n_s16",
    "vqshrun_n_s32",
    "vqshrun_n_s64",
    "vqsub_s64",
    "vqsubq_s64",
    "vqsub_u64",
    "vqsubq_u64",
    "vraddhn_high_s16",
    "vraddhn_high_s32",
    "vraddhn_high_s64",
    "vraddhn_high_u16",
    "vraddhn_high_u32",
    "vraddhn_high_u64",
    "vraddhn_s16",
    "vraddhn_s32",
    "vraddhn_s64",
    "vraddhn_u16",
    "vraddhn_u16",
    "vraddhn_u32",
    "vraddhn_u32",
    "vraddhn_u64",
    "vraddhn_u64",
    "vrecpe_f16",
    "vrecpeq_f16",
    "vrecpe_f32",
    "vrecpeq_f32",
    "vrecpe_u32",
    "vrecpeq_u32",
    "vrecps_f16",
    "vrecpsq_f16",
    "vrecps_f32",
    "vrecpsq_f32",
    "vreinterpret_f32_f16",
    "vreinterpret_f32_f16",
    "vreinterpret_s8_f16",
    "vreinterpret_s8_f16",
    "vreinterpret_s16_f16",
    "vreinterpret_s16_f16",
    "vreinterpret_s32_f16",
    "vreinterpret_s32_f16",
    "vreinterpret_s64_f16",
    "vreinterpret_s64_f16",
    "vreinterpret_u8_f16",
    "vreinterpret_u8_f16",
    "vreinterpret_u16_f16",
    "vreinterpret_u16_f16",
    "vreinterpret_u32_f16",
    "vreinterpret_u32_f16",
    "vreinterpret_u64_f16",
    "vreinterpret_u64_f16",
    "vreinterpret_p8_f16",
    "vreinterpret_p8_f16",
    "vreinterpret_p16_f16",
    "vreinterpret_p16_f16",
    "vreinterpretq_f32_f16",
    "vreinterpretq_f32_f16",
    "vreinterpretq_s8_f16",
    "vreinterpretq_s8_f16",
    "vreinterpretq_s16_f16",
    "vreinterpretq_s16_f16",
    "vreinterpretq_s32_f16",
    "vreinterpretq_s32_f16",
    "vreinterpretq_s64_f16",
    "vreinterpretq_s64_f16",
    "vreinterpretq_u8_f16",
    "vreinterpretq_u8_f16",
    "vreinterpretq_u16_f16",
    "vreinterpretq_u16_f16",
    "vreinterpretq_u32_f16",
    "vreinterpretq_u32_f16",
    "vreinterpretq_u64_f16",
    "vreinterpretq_u64_f16",
    "vreinterpretq_p8_f16",
    "vreinterpretq_p8_f16",
    "vreinterpretq_p16_f16",
    "vreinterpretq_p16_f16",
    "vreinterpret_f16_f32",
    "vreinterpret_f16_f32",
    "vreinterpretq_f16_f32",
    "vreinterpretq_f16_f32",
    "vreinterpret_f16_s8",
    "vreinterpret_f16_s8",
    "vreinterpretq_f16_s8",
    "vreinterpretq_f16_s8",
    "vreinterpret_f16_s16",
    "vreinterpret_f16_s16",
    "vreinterpretq_f16_s16",
    "vreinterpretq_f16_s16",
    "vreinterpret_f16_s32",
    "vreinterpret_f16_s32",
    "vreinterpretq_f16_s32",
    "vreinterpretq_f16_s32",
    "vreinterpret_f16_s64",
    "vreinterpret_f16_s64",
    "vreinterpretq_f16_s64",
    "vreinterpretq_f16_s64",
    "vreinterpret_f16_u8",
    "vreinterpret_f16_u8",
    "vreinterpretq_f16_u8",
    "vreinterpretq_f16_u8",
    "vreinterpret_f16_u16",
    "vreinterpret_f16_u16",
    "vreinterpretq_f16_u16",
    "vreinterpretq_f16_u16",
    "vreinterpret_f16_u32",
    "vreinterpret_f16_u32",
    "vreinterpretq_f16_u32",
    "vreinterpretq_f16_u32",
    "vreinterpret_f16_u64",
    "vreinterpret_f16_u64",
    "vreinterpretq_f16_u64",
    "vreinterpretq_f16_u64",
    "vreinterpret_f16_p8",
    "vreinterpret_f16_p8",
    "vreinterpretq_f16_p8",
    "vreinterpretq_f16_p8",
    "vreinterpret_f16_p16",
    "vreinterpret_f16_p16",
    "vreinterpretq_f16_p16",
    "vreinterpretq_f16_p16",
    "vreinterpretq_f16_p128",
    "vreinterpretq_f16_p128",
    "vreinterpret_p64_f16",
    "vreinterpret_p64_f16",
    "vreinterpretq_p128_f16",
    "vreinterpretq_p128_f16",
    "vreinterpretq_p64_f16",
    "vreinterpretq_p64_f16",
    "vreinterpret_f16_p64",
    "vreinterpret_f16_p64",
    "vreinterpretq_f16_p64",
    "vreinterpretq_f16_p64",
    "vreinterpretq_f32_p128",
    "vreinterpretq_f32_p128",
    "vreinterpret_s8_f32",
    "vreinterpret_s8_f32",
    "vreinterpret_s16_f32",
    "vreinterpret_s16_f32",
    "vreinterpret_s32_f32",
    "vreinterpret_s32_f32",
    "vreinterpret_s64_f32",
    "vreinterpret_s64_f32",
    "vreinterpret_u8_f32",
    "vreinterpret_u8_f32",
    "vreinterpret_u16_f32",
    "vreinterpret_u16_f32",
    "vreinterpret_u32_f32",
    "vreinterpret_u32_f32",
    "vreinterpret_u64_f32",
    "vreinterpret_u64_f32",
    "vreinterpret_p8_f32",
    "vreinterpret_p8_f32",
    "vreinterpret_p16_f32",
    "vreinterpret_p16_f32",
    "vreinterpretq_p128_f32",
    "vreinterpretq_p128_f32",
    "vreinterpretq_s8_f32",
    "vreinterpretq_s8_f32",
    "vreinterpretq_s16_f32",
    "vreinterpretq_s16_f32",
    "vreinterpretq_s32_f32",
    "vreinterpretq_s32_f32",
    "vreinterpretq_s64_f32",
    "vreinterpretq_s64_f32",
    "vreinterpretq_u8_f32",
    "vreinterpretq_u8_f32",
    "vreinterpretq_u16_f32",
    "vreinterpretq_u16_f32",
    "vreinterpretq_u32_f32",
    "vreinterpretq_u32_f32",
    "vreinterpretq_u64_f32",
    "vreinterpretq_u64_f32",
    "vreinterpretq_p8_f32",
    "vreinterpretq_p8_f32",
    "vreinterpretq_p16_f32",
    "vreinterpretq_p16_f32",
    "vreinterpret_f32_s8",
    "vreinterpret_f32_s8",
    "vreinterpret_s16_s8",
    "vreinterpret_s16_s8",
    "vreinterpret_s32_s8",
    "vreinterpret_s32_s8",
    "vreinterpret_s64_s8",
    "vreinterpret_s64_s8",
    "vreinterpret_u8_s8",
    "vreinterpret_u8_s8",
    "vreinterpret_u16_s8",
    "vreinterpret_u16_s8",
    "vreinterpret_u32_s8",
    "vreinterpret_u32_s8",
    "vreinterpret_u64_s8",
    "vreinterpret_u64_s8",
    "vreinterpret_p8_s8",
    "vreinterpret_p8_s8",
    "vreinterpret_p16_s8",
    "vreinterpret_p16_s8",
    "vreinterpretq_f32_s8",
    "vreinterpretq_f32_s8",
    "vreinterpretq_s16_s8",
    "vreinterpretq_s16_s8",
    "vreinterpretq_s32_s8",
    "vreinterpretq_s32_s8",
    "vreinterpretq_s64_s8",
    "vreinterpretq_s64_s8",
    "vreinterpretq_u8_s8",
    "vreinterpretq_u8_s8",
    "vreinterpretq_u16_s8",
    "vreinterpretq_u16_s8",
    "vreinterpretq_u32_s8",
    "vreinterpretq_u32_s8",
    "vreinterpretq_u64_s8",
    "vreinterpretq_u64_s8",
    "vreinterpretq_p8_s8",
    "vreinterpretq_p8_s8",
    "vreinterpretq_p16_s8",
    "vreinterpretq_p16_s8",
    "vreinterpret_f32_s16",
    "vreinterpret_f32_s16",
    "vreinterpret_s8_s16",
    "vreinterpret_s8_s16",
    "vreinterpret_s32_s16",
    "vreinterpret_s32_s16",
    "vreinterpret_s64_s16",
    "vreinterpret_s64_s16",
    "vreinterpret_u8_s16",
    "vreinterpret_u8_s16",
    "vreinterpret_u16_s16",
    "vreinterpret_u16_s16",
    "vreinterpret_u32_s16",
    "vreinterpret_u32_s16",
    "vreinterpret_u64_s16",
    "vreinterpret_u64_s16",
    "vreinterpret_p8_s16",
    "vreinterpret_p8_s16",
    "vreinterpret_p16_s16",
    "vreinterpret_p16_s16",
    "vreinterpretq_f32_s16",
    "vreinterpretq_f32_s16",
    "vreinterpretq_s8_s16",
    "vreinterpretq_s8_s16",
    "vreinterpretq_s32_s16",
    "vreinterpretq_s32_s16",
    "vreinterpretq_s64_s16",
    "vreinterpretq_s64_s16",
    "vreinterpretq_u8_s16",
    "vreinterpretq_u8_s16",
    "vreinterpretq_u16_s16",
    "vreinterpretq_u16_s16",
    "vreinterpretq_u32_s16",
    "vreinterpretq_u32_s16",
    "vreinterpretq_u64_s16",
    "vreinterpretq_u64_s16",
    "vreinterpretq_p8_s16",
    "vreinterpretq_p8_s16",
    "vreinterpretq_p16_s16",
    "vreinterpretq_p16_s16",
    "vreinterpret_f32_s32",
    "vreinterpret_f32_s32",
    "vreinterpret_s8_s32",
    "vreinterpret_s8_s32",
    "vreinterpret_s16_s32",
    "vreinterpret_s16_s32",
    "vreinterpret_s64_s32",
    "vreinterpret_s64_s32",
    "vreinterpret_u8_s32",
    "vreinterpret_u8_s32",
    "vreinterpret_u16_s32",
    "vreinterpret_u16_s32",
    "vreinterpret_u32_s32",
    "vreinterpret_u32_s32",
    "vreinterpret_u64_s32",
    "vreinterpret_u64_s32",
    "vreinterpret_p8_s32",
    "vreinterpret_p8_s32",
    "vreinterpret_p16_s32",
    "vreinterpret_p16_s32",
    "vreinterpretq_f32_s32",
    "vreinterpretq_f32_s32",
    "vreinterpretq_s8_s32",
    "vreinterpretq_s8_s32",
    "vreinterpretq_s16_s32",
    "vreinterpretq_s16_s32",
    "vreinterpretq_s64_s32",
    "vreinterpretq_s64_s32",
    "vreinterpretq_u8_s32",
    "vreinterpretq_u8_s32",
    "vreinterpretq_u16_s32",
    "vreinterpretq_u16_s32",
    "vreinterpretq_u32_s32",
    "vreinterpretq_u32_s32",
    "vreinterpretq_u64_s32",
    "vreinterpretq_u64_s32",
    "vreinterpretq_p8_s32",
    "vreinterpretq_p8_s32",
    "vreinterpretq_p16_s32",
    "vreinterpretq_p16_s32",
    "vreinterpret_f32_s64",
    "vreinterpret_f32_s64",
    "vreinterpret_s8_s64",
    "vreinterpret_s8_s64",
    "vreinterpret_s16_s64",
    "vreinterpret_s16_s64",
    "vreinterpret_s32_s64",
    "vreinterpret_s32_s64",
    "vreinterpret_u8_s64",
    "vreinterpret_u8_s64",
    "vreinterpret_u16_s64",
    "vreinterpret_u16_s64",
    "vreinterpret_u32_s64",
    "vreinterpret_u32_s64",
    "vreinterpret_u64_s64",
    "vreinterpret_p8_s64",
    "vreinterpret_p8_s64",
    "vreinterpret_p16_s64",
    "vreinterpret_p16_s64",
    "vreinterpretq_f32_s64",
    "vreinterpretq_f32_s64",
    "vreinterpretq_s8_s64",
    "vreinterpretq_s8_s64",
    "vreinterpretq_s16_s64",
    "vreinterpretq_s16_s64",
    "vreinterpretq_s32_s64",
    "vreinterpretq_s32_s64",
    "vreinterpretq_u8_s64",
    "vreinterpretq_u8_s64",
    "vreinterpretq_u16_s64",
    "vreinterpretq_u16_s64",
    "vreinterpretq_u32_s64",
    "vreinterpretq_u32_s64",
    "vreinterpretq_u64_s64",
    "vreinterpretq_u64_s64",
    "vreinterpretq_p8_s64",
    "vreinterpretq_p8_s64",
    "vreinterpretq_p16_s64",
    "vreinterpretq_p16_s64",
    "vreinterpret_f32_u8",
    "vreinterpret_f32_u8",
    "vreinterpret_s8_u8",
    "vreinterpret_s8_u8",
    "vreinterpret_s16_u8",
    "vreinterpret_s16_u8",
    "vreinterpret_s32_u8",
    "vreinterpret_s32_u8",
    "vreinterpret_s64_u8",
    "vreinterpret_s64_u8",
    "vreinterpret_u16_u8",
    "vreinterpret_u16_u8",
    "vreinterpret_u32_u8",
    "vreinterpret_u32_u8",
    "vreinterpret_u64_u8",
    "vreinterpret_u64_u8",
    "vreinterpret_p8_u8",
    "vreinterpret_p8_u8",
    "vreinterpret_p16_u8",
    "vreinterpret_p16_u8",
    "vreinterpretq_f32_u8",
    "vreinterpretq_f32_u8",
    "vreinterpretq_s8_u8",
    "vreinterpretq_s8_u8",
    "vreinterpretq_s16_u8",
    "vreinterpretq_s16_u8",
    "vreinterpretq_s32_u8",
    "vreinterpretq_s32_u8",
    "vreinterpretq_s64_u8",
    "vreinterpretq_s64_u8",
    "vreinterpretq_u16_u8",
    "vreinterpretq_u16_u8",
    "vreinterpretq_u32_u8",
    "vreinterpretq_u32_u8",
    "vreinterpretq_u64_u8",
    "vreinterpretq_u64_u8",
    "vreinterpretq_p8_u8",
    "vreinterpretq_p8_u8",
    "vreinterpretq_p16_u8",
    "vreinterpretq_p16_u8",
    "vreinterpret_f32_u16",
    "vreinterpret_f32_u16",
    "vreinterpret_s8_u16",
    "vreinterpret_s8_u16",
    "vreinterpret_s16_u16",
    "vreinterpret_s16_u16",
    "vreinterpret_s32_u16",
    "vreinterpret_s32_u16",
    "vreinterpret_s64_u16",
    "vreinterpret_s64_u16",
    "vreinterpret_u8_u16",
    "vreinterpret_u8_u16",
    "vreinterpret_u32_u16",
    "vreinterpret_u32_u16",
    "vreinterpret_u64_u16",
    "vreinterpret_u64_u16",
    "vreinterpret_p8_u16",
    "vreinterpret_p8_u16",
    "vreinterpret_p16_u16",
    "vreinterpret_p16_u16",
    "vreinterpretq_f32_u16",
    "vreinterpretq_f32_u16",
    "vreinterpretq_s8_u16",
    "vreinterpretq_s8_u16",
    "vreinterpretq_s16_u16",
    "vreinterpretq_s16_u16",
    "vreinterpretq_s32_u16",
    "vreinterpretq_s32_u16",
    "vreinterpretq_s64_u16",
    "vreinterpretq_s64_u16",
    "vreinterpretq_u8_u16",
    "vreinterpretq_u8_u16",
    "vreinterpretq_u32_u16",
    "vreinterpretq_u32_u16",
    "vreinterpretq_u64_u16",
    "vreinterpretq_u64_u16",
    "vreinterpretq_p8_u16",
    "vreinterpretq_p8_u16",
    "vreinterpretq_p16_u16",
    "vreinterpretq_p16_u16",
    "vreinterpret_f32_u32",
    "vreinterpret_f32_u32",
    "vreinterpret_s8_u32",
    "vreinterpret_s8_u32",
    "vreinterpret_s16_u32",
    "vreinterpret_s16_u32",
    "vreinterpret_s32_u32",
    "vreinterpret_s32_u32",
    "vreinterpret_s64_u32",
    "vreinterpret_s64_u32",
    "vreinterpret_u8_u32",
    "vreinterpret_u8_u32",
    "vreinterpret_u16_u32",
    "vreinterpret_u16_u32",
    "vreinterpret_u64_u32",
    "vreinterpret_u64_u32",
    "vreinterpret_p8_u32",
    "vreinterpret_p8_u32",
    "vreinterpret_p16_u32",
    "vreinterpret_p16_u32",
    "vreinterpretq_f32_u32",
    "vreinterpretq_f32_u32",
    "vreinterpretq_s8_u32",
    "vreinterpretq_s8_u32",
    "vreinterpretq_s16_u32",
    "vreinterpretq_s16_u32",
    "vreinterpretq_s32_u32",
    "vreinterpretq_s32_u32",
    "vreinterpretq_s64_u32",
    "vreinterpretq_s64_u32",
    "vreinterpretq_u8_u32",
    "vreinterpretq_u8_u32",
    "vreinterpretq_u16_u32",
    "vreinterpretq_u16_u32",
    "vreinterpretq_u64_u32",
    "vreinterpretq_u64_u32",
    "vreinterpretq_p8_u32",
    "vreinterpretq_p8_u32",
    "vreinterpretq_p16_u32",
    "vreinterpretq_p16_u32",
    "vreinterpret_f32_u64",
    "vreinterpret_f32_u64",
    "vreinterpret_s8_u64",
    "vreinterpret_s8_u64",
    "vreinterpret_s16_u64",
    "vreinterpret_s16_u64",
    "vreinterpret_s32_u64",
    "vreinterpret_s32_u64",
    "vreinterpret_s64_u64",
    "vreinterpret_u8_u64",
    "vreinterpret_u8_u64",
    "vreinterpret_u16_u64",
    "vreinterpret_u16_u64",
    "vreinterpret_u32_u64",
    "vreinterpret_u32_u64",
    "vreinterpret_p8_u64",
    "vreinterpret_p8_u64",
    "vreinterpret_p16_u64",
    "vreinterpret_p16_u64",
    "vreinterpretq_f32_u64",
    "vreinterpretq_f32_u64",
    "vreinterpretq_s8_u64",
    "vreinterpretq_s8_u64",
    "vreinterpretq_s16_u64",
    "vreinterpretq_s16_u64",
    "vreinterpretq_s32_u64",
    "vreinterpretq_s32_u64",
    "vreinterpretq_s64_u64",
    "vreinterpretq_s64_u64",
    "vreinterpretq_u8_u64",
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